LabVIEW FPGA 8.6中的时序约束错误
主要软件:
主要软件版本: 8.6
主要软件修正版本: N/A
次要软件: Driver Software>>NI-RIO
问题: 我在编译一个LabVIEW FPGA VI时遇到一个时序错误如下:
Timing constraint: TS_ TheWindowx_RioClk40Derived29x23ClkFXFromDCM1= PERIOD TIMEGRP
"TheWindowx_RioClk40Derived29x23ClkFXFromDCM1" TS_RioClk40pin / 1.26 HIGH 50%;
20 items analyzed, 2 timing errors detected. (1 setup error, 1 hold error)
Minimum period is 26310.429ns.
我该怎么解决?
解答: 要解决这个问题,你需要将附件中的压缩包解压到
labview\rvi\HDL\NiCores\ClockBoundaryCrossing\Source\DoubleSync
下并覆盖已有的文件。
相关链接: KnowledgeBase 3YLFQG1O: FPGA Xflow Compile Error 2 When Compiling LabVIEW FPGA VI
附件:
报告日期: 09/18/2008
最近更新: 08/20/2010
文档编号: 4PHGA62M
Other Support Options
Ask the NI Community
Collaborate with other users in our discussion forums
Request Support from an Engineer
A valid service agreement may be required, and support options vary by country.