From Friday, April 19th (11:00 PM CDT) through Saturday, April 20th (2:00 PM CDT), 2024, ni.com will undergo system upgrades that may result in temporary service interruption.
We appreciate your patience as we improve our online experience.
From Friday, April 19th (11:00 PM CDT) through Saturday, April 20th (2:00 PM CDT), 2024, ni.com will undergo system upgrades that may result in temporary service interruption.
We appreciate your patience as we improve our online experience.
|
当对一个FlexRIO对象的FPGA VI进行编译时,LabVIEW FPGA 必须编译VI本身,FlexRIO socketed CLIP,以及一些FlexRIO固定逻辑。 为了保证所有FlexRIO逻辑均能在编译时符合时序要求,FlexRIO将其等级默认设为高级。 如果改变默认设置将会导致FlexRIO固定逻辑以及DRAM核编译出错,或是提供错误数据。为了防止对默认级别的更改,针对FlexRIO而言,Xilinx编译选项已被禁用。
|