Error when Building FPGA VI with 16 32-bit Multiplication FunctionsPrimary Software: LabVIEW Modules>>FPGA ModulePrimary Software Version: 1.1 Primary Software Fixed Version: N/A Secondary Software: N/A Hardware: Reconfigurable I/O (RIO)>>R Series>>PCI-7831R
Problem: I have an FPGA VI that has 16 32-bit multiplication functions. When I try to build it, at the end of the compilation, I get an error from the LabVIEW FPGA Compile Server. Why am I getting this error, and how can I prevent it? Solution: Currently, this is expected behavior. The error you are seeing is due to 'overmapping', meaning that your code requires too much of some resources available on the FPGA device. When compiling 32-bit multiplication functions, each of them uses 3 built-in multipliers (MULT18X18s). There are a total of 40 such internal multipliers available. So as you can see, you are using 48 built-in multipliers when you try to compile the 16 32-bit multiplication functions, which is 8 more than what is available. Thus you get this error. If you look at the bottom of the compile report in the Design Summary section, you will see that it says something to this effect:Number of MULT18X18s: 48 out of 40 120% (OVERMAPPED)Similarly, if you use more than 40 16-bit multiplication functions, you will get the same error. To avoid this error, minimize your multiplications as much as possible and try to use less than 40 built-in multipliers. If possible, you can try to replace each of the multiplication functions with a Compound Arithmetic multiplication function. This function does not use the built-in MULT18x18 multipliers like the regular function does. However, beware that there may be a performance lag due to not using the built-in multipliers. Related Links: Attachments:
Report Date: 05/12/2004 Last Updated: 05/14/2004 Document ID: 39BEKNDS |
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