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Can I Create Socketed CLIP For My R-Series Board?

Primary Software: LabVIEW Modules>>FPGA Module
Primary Software Version: 8.6.1
Primary Software Fixed Version: N/A
Secondary Software: N/A

Problem:
I would like to connect my VHDL core directly to my R-Series input and output. Can I use Socketed CLIP to do this?

Solution:
CLIP (Component Level IP) allows you to import and use previously developed VHDL in your LabVIEW FPGA VIs. But a standard CLIP interface does not allow any connection to FPGA IO. Socketed CLIP allows you to interface your VHDL to FPGA IO directly within the VHDL code.

However, Socketed CLIP is only supported in the FlexRIO. R-Series devices only support standard CLIP interfaces.

Related Links:
KnowlegeBase 4RC9UT5M: Difference Between CLIP Node and HDL Node

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Report Date: 05/28/2009
Last Updated: 06/05/2009
Document ID: 4XRGP6MO

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