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Possible Sources of HSDIO Acquisition Error with NI 655x

Hardware: Digital I/O (DIO)>>High-Speed>>PXI-6551, Digital I/O (DIO)>>High-Speed>>PXI-6552, Digital I/O (DIO)>>High-Speed>>PCI-6551, Digital I/O (DIO)>>High-Speed>>PCI-6552

Problem:
I am performing an acquisition with an NI 6551 or NI 6552 device, and I am not acquiring the data that I know I should be. Furthermore, I have an oscilloscope or digital multimeter on the lines and I notice that the logic levels are not what I expect. What may be happening?

Solution:
Three possible problems could be causing this issue. Each of the following problems can be fixed by properly configuring your NI 655x digital waveform generator/analyzer:

Input impedance mismatch
Driving a line while acquiring
Programmable logic level

Input impedance mismatch
The NI 655x can be configured with a 50 Ω or 50 kΩ input impedance. The 50 Ω input impedance is intended for matched-impedance systems where it is most important to keep reflections out of the line. This configuration does cause a voltage-dividing effect; the measured logic amplitude will be one-half of the source voltage. For applications where minor reflections are acceptable, the 50 kΩ input impedance can be selected. Figure 1 shows the voltage divider effect of 50 Ω input impedance with a 50 Ω source impedance.

Figure 1. NI 655x Input Impedance

Driving a line while acquiring
The NI 655x can generate and acquire at the same time. This capability allows you to acquire what you have just generated, or you can generate while another device is also driving the line. To prevent the NI 655x from driving the line, you can tristate the channels. The tristate operation effectively removes the driver circuitry from the line. The channel electronics for the NI 655x can be seen in Figure 2. Notice that the Pattern Generation and Pattern Acquisition circuitry are separate and independent.

Figure 2. 655x Channel Electronics

To tristate the lines, use the niHSDIO Tristate Channels VI. This VI has a boolean input that you can set to TRUE to enable Tristate and FALSE to disable the Tristate. The correct usage of this VI can be seen in Figure 3. In this figure, Tristate is enabled while the niHSDIO Read Static (U32) VI is called.

Figure 3. Tristate enable then disable

Programmable Logic Levels
The NI 655x allows you to program the high and low voltages that will be expected as Logic High and Logic Low, respectively. This flexibility requires that you know what amplitude the signal will have when it reaches the NI 655x channel electronics. If the High or Low voltages are not configured correctly, the card does not recognize a logic high or low, and you will miss data.

The voltage ranges can be programmed in 10 mV increments from -2 V to +5.5 V for generation and acquisition sessions. An niHSDIO Property Node configures the Voltage Input High and Voltage Input Low levels as shown in Figure 4.

Figure 4. NI 655x Voltage Input High and Low

Report Date: 10/23/2007
Last Updated: 03/03/2009
Document ID: 4EMLPRVZ

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