Choosing Pull-Up Resistor Values for R Series Devices Digital Output Lines Hardware: Reconfigurable I/O (RIO)>>R Series>>PCI-7831R, Reconfigurable I/O (RIO)>>R Series>>PXI-7831R, Reconfigurable I/O (RIO)>>R Series>>PCI-7813R, Reconfigurable I/O (RIO)>>R Series>>PXI-7813R, Reconfigurable I/O (RIO)>>R Series>>PCI-7833R, Reconfigurable I/O (RIO)>>R Series>>PXI-7833R, Reconfigurable I/O (RIO)>>R Series>>PCI-7811R, Reconfigurable I/O (RIO)>>R Series>>PCI-7831R, Reconfigurable I/O (RIO)>>R Series>>PXI-7811R, Reconfigurable I/O (RIO)>>R Series>>PCI-7830R, Reconfigurable I/O (RIO)>>R Series>>PXI-7831R, Reconfigurable I/O (RIO)>>R Series>>PXI-7830R
Problem: By default, the digital output lines of the R Series devices output a high value of 3.3 V. According to the manual, to create a TTL signal with a 5 V high on the digital output lines, I need to add an external pull-up resistor. What is the output impedance of R Series devices and what value should the pull-up resistor be? Solution: The output impedance for the R Series devices is non-linear due to the circuitry used to provide 5V tolerance. The output impedance is low (<50 ohms) for output voltages near 0V. As the output voltage increases to around 3.3V, the impedance rises to approximately 100 ohms. As the voltage rises beyond 3.3V, the impedance rises very quickly to megohms. Here's an approximation for how to calculate the value of pull-up resistor that you need:
For example: Vt = 4.7V. This is the threshold level that we need to pull-up to. DeltaT = 1us. This is the time required for the pull-up resistor to pull the digital output line from 3.3V to the 4.7V threshold level Ctot = 100pF. Ctot represents the total capacitance on the digital output line. The pull-up resistor, Rp, would then be: Rp = DeltaT / ( Ctot * ( ln(1 - 3.3/5) - ln(1 - Vt/5) ) ) Rp = 1us / ( 100pF * ( ln(1 - 3.3/5) - ln(1 - 4.7/5) ) ) = 5.765 kOhms *Note: The onboard capacitance between a DO and GND is about 28pF. The cable adds about 60pF per meter. Related Links: Product Manuals: NI 783xR User Manual LabVIEW FPGA Module 8.2 Help Attachments:
Report Date: 11/11/2004 Last Updated: 02/07/2007 Document ID: 3FAGPSL1 |
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