Academic Company Events NI Developer Zone Support Solutions Products & Services Contact NI MyNI
This Document is not yet Rated  Rate this Document

How Are the ACK and REQ Lines Controlled on the 6533/6534 DIO Devices?

Hardware: Legacy DAQ Devices>>Digital I/O>>PC-DIO-24

Problem:
I am developing an application that will be using the Handshaking I/O Burst Protocol on my 653x3/6534 device. I am a little unclear as to how the ACK and REQ lines are used. What controls these lines, and do I need to programmatically set one of these lines when I am ready to transfer data?

Solution:
The ACK line is set by the DIO device automatically when the device is ready to send data for an output operation. The manual states that the ACK line is changed as follows:

"The DIO-32HS(653x) device asserts the ACK line when it is ready for a transfer..."

The device is "ready for a transfer" when the device is properly configured and your program has sent data to the board's buffer to be output (or it has room on the buffer for input operations if doing an input). It is at this point, when the board has valid data waiting to be written out on its ports (or can accept input values), that the ACK line becomes asserted. The assertion of ACK tells the peripheral device that the 6533/6534 is ready for a transfer. When the peripheral device is in a state where it can receive (or send) data, it should assert its REQ line. The REQ line is set externally and should be controlled by the external device or manually wired in order to transfer data.

The transfer will begin on the first edge (rising or falling depending on configuration) of PCLK after both the REQ and ACK lines are valid. This transfer will continue until either one of the ACK or REQ lines is deasserted. When all the data has been sent out of the DIO device's buffer, then its ACK line becomes invalid indicating that it is not ready to send because its buffer is empty. This availability of data will be controlled by your program that specifies the configuration, such as the buffer size and rate of transfer, of the 6533/6534 device.

The following are two brief descriptions found in the user manual and on-line that further discuss the interaction between the ACK, REQ, and PCLK lines of the 6533/6534 when performing Handshaking I/O in Burst mode and more overview of the burst mode:
  • "The Burst Mode utilizes three (3) control lines that dictate data transfers: the REQ, ACK, and PCLK signals. The 6533/6534 device asserts the ACK line when it is ready for a transfer; the device the 6533/6534 is communicating with asserts the REQ signal when it is ready for a transfer. Either the 6533/6534 or a peripheral device can generate the PCLK signal; transfers occur on the rising edge of the PCLK signal as long as both the REQ and ACK lines are asserted.

    If data transfers are taking place too fast, then either the 6533/6534 or the peripheral device can deassert the ACK or REQ line respectively, thus pausing the data transfer process. When either device is ready to continue data transfers it reasserts its control line. As long as the peripheral device can at least monitor the ACK signal of the 6533/6534, then Burst Mode handshaking is the best mode for which to configure the 6533/6534."

  • "Burst mode is a handshaking protocol. The REQ and ACK lines are used to make sure that the external device is ready to accept incoming data. You can use the PCLK line on the board to generate pulses coinciding with each new digital data pattern that you output. However, it is important to remember that by default, PCLK is configured as an input when you are sending data out in burst mode. If you do not change this, the 6533/6534 will never produce any data until it receives pulses on PCLK.

    You can reconfigure the PCLK line to work as an output -- this is called "reversing the PCLK." When you reverse PCLK, you can control the data update rate using a parameter called "PCLK delay." Only certain discrete values are allowed: 1.48 MHz, 1.67 MHz, 2.00 MHz, 2.50 MHz, 3.33 MHz, 5.00 MHz, 10 MHz, and 20 MHz (delays of 700 ns, 600 ns, 500 ns, 400 ns, 300 ns, 200 ns, 100 ns, 0 ns, respectively)."

Also remember to take a look at the shipping examples (either in LabVIEW or those that ship with NI-DAQ or NI-DAQmx) to get a better understanding of the type of applications you can use with the 6533/6534. They can also help you monitor the state of the ACK, REQ, and PCLK lines to see how the information is sent and check its behavior.

Related Links:
National Instruments Data Acquisition Support Homepage
NI 6533/6534 for NI-DAQmx Help
Product Manuals: 6533/6534 User Manual for Traditional NI-DAQ
KnowledgeBase 1SSFQR00. Configuring the Handshaking Lines of a 6533/6534 Board

Attachments:





Report Date: 01/21/2004
Last Updated: 08/27/2008
Document ID: 35KDQAKD

Your Feedback! poor Poor  |  Excellent excellent   Yes No
 Document Quality? 
 Answered Your Question? 
  1 2 3 4 5
Please Contact NI for all product and support inquiries.submit