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Hardware Red LED When Using External Clock With HSDIO

Hardware: Digital I/O (DIO)>>High-Speed>>PCI-6552, Digital I/O (DIO)>>High-Speed>>PXI-6562, Digital I/O (DIO)>>High-Speed>>PXI-6542, Digital I/O (DIO)>>High-Speed>>PCI-6551, Digital I/O (DIO)>>High-Speed>>PCI-6542, Digital I/O (DIO)>>High-Speed>>PXI-6561, Digital I/O (DIO)>>High-Speed>>PXI-6541, Digital I/O (DIO)>>High-Speed>>PCI-6541, Digital I/O (DIO)>>High-Speed>>PCI-6561, Digital I/O (DIO)>>High-Speed>>PXI-6552, Digital I/O (DIO)>>High-Speed>>PCI-6562

Problem:
I am using one of the NI-HSDIO devices (654x, 655x or 656x) with an external clock. If I stop the external clock after my acquisition/generation, the front panel red LED lights up and I cannot clear this error status. Why is this LED turning on and how can I fix this?

Solution:
The NI-HSDIO devices (654x, 655x and 656x) require a continuous free running external clock. There are internal Phase Locked Loops (PLL) that will lock onto this frequency and will give an error (LED lights red) if the clock is stopped (even after the acquisition/generation session is closed).

There are two options to prevent this error:
  1. The first option is to change the sample clock source to use the on-board clock instead of an external clock prior to closing the sesion. You can use the niHDIO Abort VI or function to stop the generation or acquisition then implement the section of code in Figure 1 before closing the HSDIO session. The additonal code consists of a Property Node for sample clock source (SampClk.Source) with an input of "On Board Clock", niHSDIO Commit.vi, and niHSDIO Close.vi. This is the preferred option because it only reconfigures the clock source property.


    2. Figure1. This code will prevent the red LED status when added.

  2. The other option is to completely reset the device so the PLLs will unlock and prevent the red LED error status. Use the niHSDIO Reset Device.vi or the function niHSDIO_ResetDevice to perform this action. This will reconfigure all of the device settings and take more time to complete than the first option. For more detailed information on the niHSDIO Reset Device function, view the topic titled niHSDIO Reset Device in the NI Digital Generator/Analyzer Help.
Note: The VI niHSDIO reset or function niHSDIO_reset will not unlock the PLLs.

Related Links:
Knowledge Base 41SI2DJQ: External Clocking for HSDIO Devices
Product Manuals: NI Digitial Generator/Analyzer Help

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Report Date: 07/26/2007
Last Updated: 10/20/2008
Document ID: 4BP6HQJX

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