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VXI Trigger Tutorial

Primary Software: Driver Software>>NI-VXI/VISA
Primary Software Version: 3.3.1
Primary Software Fixed Version: N/A
Secondary Software: N/A

Problem:
How do triggers work with VXI/VME?

Solution:
The VMEbus standards defined a high-performance bus for test systems, but it did not cover the issues of timing and synchronization. VXI extended the VMEbus standards to define a trigger bus and protocols for trigger acknowledgments. These lines can be used for beginning or ending an acquisition sequence, for automating a test sequence, or for communicating as a digital bus.

Any device is capable of asserting or receiving triggers as long as the hardware is available to control or respond to these lines. VXI/VME devices can be synchronized through the use of the VXIbus-defined trigger protocols to improve system performance with little software development.   Synchronization is fixed with a known propagation rate of only 2 ns between slots on the VXI backplane. The VXIbus specification does not specifically define how to use these lines, but does define protocols for acknowledging triggers.

 
To enhance the VXIbus standards, National Instruments has designed an application-specific integrated circuit (ASIC) called the Trigger Interface Chip (TIC) to enhance the user’s ability beyond the VXIbus definitions to implement triggering, signal routing, counting, and timing. On the National Instruments Slot 0 controllers that use the TIC ASIC (MXI-2, embedded, and GPIB-VXI controllers), there are 10 general-purpose input/output (GPIO) lines that can route non-trigger signals to or from the controller’s front panel. Three are preassigned to the external CLK10, Trig In, and Trig Out connectors.

Structure of the Trigger Bus
The VXIbus specification defines the Trigger bus to be eight TTL trigger lines (TTLTRG0* through TTLTRG7*) and six ECL trigger lines (ECLTRG0 through ECLTRG5). Four of the ECL lines are only available on the P3 connector of D-sized cards (ECLTRG 2 through ECLTRG5), but their capabilities were not specified by the VXIbus Consortium, and the Resource Manager does not use these lines during system configuration. However, the VXIbus Consortium did define some protocols to allow multivendor interoperability—Start/Stop (STST), SYNC, and ASYNC. There is an additional protocol that can be useful, although it is not presently defined in the Rev. 1.4 of the VXIbus Specifications, the semi-sync protocol. It is a useful protocol but was removed from an earlier specification due to some problems in defining it with regard to multiple acceptors. Only the first two VXIbus-defined protocols will be discussed in this document as the ASYNC protocol is rarely used.


On/Off or Start/Stop (STST) Trigger Protocol
The VXIbus Specification defines the Start/Stop (STST) trigger protocol only for Slot 0 devices. However, because this is a useful and popular protocol, VISA defines the On and Off protocol as it does the Start/Stop protocol, but extends it to be useful in any slot, not just Slot 0. The embedded computer can even use On/Off triggering as a non-Slot 0 device. The On/Off protocol is exactly what it sounds like. When the trigger line is held low (On), the device can initiate its activity; when held high (Off), the device stops its activity. An example of this is a device which acquires and processes data while the source holds a trigger line low (On) and stops when the source raises the trigger line high (Off).

This protocol’s timing is very precise because it uses the 10 Mhz CLK10 signal to synchronize the On and Off signals. Also, the propagation delay between slots in a chassis is always 2 ns; this means that cards in any two slots can be synchronized to start at the same time because the delay can easily be calculated between the two slots.

Device A is the controller that sends out a start signal to the two devices, B and C. Device A sends out a start signal which is clocked in by the CLK10 rising edge. Since it takes 20 ns longer for the CLK10 signal to arrive at Device C, Device B can internally delay its trigger by 20 ns in order to synchronize its activities with those of Device C. This assumes that Device B has an internal delay capability.

Synchronous (SYNC) Trigger Protocol
The SYNC protocol is the simplest trigger protocol; it does not require an acknowledgment from a receiving device. It uses a single pulse on one trigger line and is asserted low.

For more information on triggers, refer to the VXI bus specifications and also to National Instruments Technical Note 040, Triggering with NI-VXI, linked below.

Related Links:
Developer Zone: Triggering with NI-VXI

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Report Date: 07/24/2006
Last Updated: 08/22/2007
Document ID: 3ZN887C5

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