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NI-HSDIO Dynamic Generation with External Clock Gives Incorrect Output

Primary Software: Driver Software>>NI-HSDIO
Primary Software Version: 1.4
Primary Software Fixed Version: N/A
Secondary Software: LabVIEW Development Systems>>LabVIEW Professional Development System
Hardware: Digital I/O (DIO)>>High-Speed>>PXI-6552

Problem:
Why am I seeing an incorrect output when I dynamically generate a signal with an external clock on my NI-HSDIO device? I am sending a reference clock above 50 MHz to CLK IN, but the digital output is only 60mV or nothing at all.

Solution:
When using an external clock, the NI-HSDIO card uses the Clock Rate of the niHSDIO Configure Sample Clock.vi for internal configuration. By default, this Clock Rate is 50 MHz. If this value is not specified, or left as the default value, and the external clock is run at speeds near 100 MHz, you can experience the problem above. To correct this issue, specify the Clock Rate of the niHSDIO Configure Sample Clock.vi.

Related Links:
Product Manuals:  High Speed-Digitizers Help

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Report Date: 05/26/2006
Last Updated: 12/12/2011
Document ID: 3XPD2JJQ

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