Configuring the REQ Clock Output Pin for an NI 6533/6534 DeviceHardware: Digital I/O (DIO)>>High-Speed>>PCI-6534
Problem: I am performing pattern I/O from my NI 6533/6534 device, and I do not see a clock out of the REQ pin. However, I do see the pin go high when running and low otherwise. Solution: Depending on the sample rate of the device with which you are monitoring the REQ line, you might not see the clock pulses. The clock cycle that is sent out of the REQ pin is generated during I/O, but its duty cycle is very high. This is because most devices require a minimum pulse width of around 20 ns to recognize a rising edge, so that is the time that the clock turns low when outputting. If you are generating a 100 Hz signal, it will be high for 9.99998 ms and low for .00002 ms. Unless you are sampling at a very high rate or you are looking at a small section of the clock, you most likely will not see the change on a scope or DMM. The pulse is enough for communicating devices to recognize in handshaking and pattern I/O as it meets the minimum TTL duration specification. Refer to the example linked below if you want to change to pulse width of the REQ line. Related Links: Product Manuals: NI 6533/6534 for NI-DAQmx Help Product Manuals: NI 6533/6534 User Manual for Traditional NI-DAQ Developer Zone Example: Changing the Pulse Width of an Internally-Generated REQ Attachments:
Report Date: 03/31/2003 Last Updated: 09/05/2008 Document ID: 2VU9C4YB |
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