Using Multiple Loops With The NI 9205 ModuleHardware: CompactDAQ>>Analog Input Modules>>NI 9205
Problem: I have multiple loops in my FPGA VI which each access different channels of the NI 9205 module. How can I ensure the maximum performance from the module in this configuration? Solution: Because the NI 9205 contains an analog to digital converter that utilizes a two element pipeline, it is important to manage this pipeline correctly in order to achieve the update rates specified in the modules documentation. The FPGA IO node can manage this pipeline for you to achieve the best performance, but you must ensure that all channels are read from the same IO node. If your architecture necessitates the use of multiple loops accessing different channels in the module, you will need to manually manage this pipeline using the IO Sample Method. The IO Sample method node allows you to add an element to the pipeline while simultaneously receiving a new sample. You can use this method in conjunction with loop timing or handshaking to manually control what elements are in the pipeline and what sample is received at each call of the node. Refer to the LabVIEW help topic IO Sample Method for more information on the format for the configuration element placed into the pipeline. To find the Help page, follow the steps below. ![]()
Related Links: KnowlegeBase 40BE130U: Does the NI-9205/9206 Use the Linerization Coefficients When Returning Calibrated Data in LabVIEW FPGA? Attachments:
Report Date: 01/17/2009 Last Updated: 05/26/2009 Document ID: 4TGJ94MO |
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