Digital Input/Output (DIO) Hardware Change from OKI 82C55 to Intersil 82C55

Product Name	NI Part Number
PCI-DIO-96	182920H-01, 182920J-01
PCI-6503	185183E-01
PXI-6508	184836E-01
DAQCard-DIO-24	182680E-01, 182680F-01, 182680G-01

Which Applications ARE Affected
If any of the conditions below are true, the behavioral changes of the Intersil component might affect your application:

At power up, the lines need to be in a low state
OR, the driver of an input line is “open collector” type
OR the state of the line is important when:
- The line is configured as an input
- AND no external device is actively driving the line to “1” or “0”.

In all other cases, the application should NOT be affected by this specification change.

Note: If your application is affected by this change, please continue reading for possible workarounds. If these workarounds will not work for your application, please contact National Instruments support.

Description of the behavior changes

In the following discussion, the terms "Port A","Port B", and "Port C" refer to the three ports on every 8255 chip. An NI product with multiple 8255 chips (such as the PCI-DIO-96) will have one of each port for every chip.

Power up state: When it was necessary for the lines to power up in the low state, this was formerly configured by pulling the line low with a pull down resistor. Some NI products have a jumper setting to do this with an onboard 100kΩ resistor; others required external resistors. At power up the Intersil component resets its lines to weakly drive the lines high (with up to 400uA) and stay in the high state unless a zero is seen on the line. This means that unless the pull down resistor is strong enough (lower than 1.7 kΩ), the line may not go to a logic low state. Applications that formerly relied on the onboard 100 kΩ pull down (jumper setting) or on an external resistor that is greater than 1.7kΩ may not power up on a low state under most conditions. The only work around for this problem is to use a strong (<1.7 kΩ) pull down resistor. Be aware that using such a strong pull down resistor will require more current of the driver of the line. If the NI device is the driver of the line, the stronger pull down resistor will leave less usable current to the rest of the circuit.

Input Configuration: When a digital I/O line is configured as input, its value is normally defined by the driver driving that line. When there is no driver, then the value can be defined using pull resistors (a pull up will define a ‘1’ value, and a pull down resistor will define a ‘0’ value). The boards with the Intersil part have additionally a feature called a “bus hold”. This element will try to remember the last value driven to the line and will try to hold that value by driving the line weakly (similar to a pull resistor).

The bus hold circuit on Port A of the Intersil 82C55 can hold a high or low state and is active as long as the line is configured as an input. When the line changes direction from output to input, the last value written to the line will determine whether the bus hold circuit pulls the line high or low. If the last value written was a high voltage, the bus hold will try to keep the high value. If the last value written was a low, the bus hold will try to keep the low value. The only way to override the values set by the bus hold would be to drive the line from some external device or to use strong pull resistors (<1.7 kΩ for pull down, <5.3 kΩ for pull up).

The bus hold circuit on ports B and C of the Intersil part can only hold a high state (‘1’) and is only active from the time the line is configured as an input until the line recognizes a low value on the input. Once the line is driven to a low value (by some external device), the bus hold for that line is disabled and will not be enabled again until the port is reconfigured as an input. If the last value driven to the line was high, the bus hold will try to keep that value, so the line will remain high when no driver is actively driving it. If the last value driven to the line is low and the line has a pull down resistor, then the bus hold may or may not be enabled depending on the value of the resistor. If the bus hold is enabled, then it will be disabled as soon as the line is driven low by an external device.

If you want the line to remain pulled in a specific direction when not driven, then the workaround is to drive the line to the desired state before changing its direction to input. On ports B and C, a pull down resistor (up to 100 kΩ) is necessary to keep the low state pull. On port A, the pull down resistor is optional.

Open Collector drivers:Open collector drivers actively drive a 0 to the line, but rely on a pull up resistor in order to drive a 1. Ports B and C of the Intersil 82C55 will work as expected because the bus hold circuit on those lines can only pull high and it gets disabled at the first 0 seen. A pull up is still required, and the value of the resistor can be calculated normally based on the current sinking capability of the drivers and the speed of the rising edge required.

Port A, on the other hand, has a bus hold that is always active (while the line is configured as an input) and can hold either state. When the line is driven by open collector drivers to a logic 0, the input sees an active 0. The bus hold circuit switches polarity and will attempt to hold the low value. When the open collector driver goes into a high-impedance state (in an attempt to allow the line to be pulled high by a pull up resistor), the bus hold will continue holding the line low. The line cannot be pulled high again unless a standard driver actively drives the line high or if the pull up resistor is strong enough to override the bus hold. The maximum pull up resistor value that will guarantee a high value on the line is 5.3 kΩ. Applications that previously relied on the built-in 100 kΩ resistor to pull the line high will be affected by the addition of these bus hold circuits.

Summary Tables for Changed Behavior

No External Pull Resistors Added

Boards with no Pull Up or Pull Down resistors. (i.e. PCI-1200)

	OKI	Intersil
Power Up State	Undefined	Pulled High
Change Direction to input	Undefined	Ports B,C: Will be pulled high Port A: will hold last value written to the line.

Boards with 100 kΩ Pull Up resistors. (i.e. PCI-DIO-96)

	OKI	Intersil
Power Up State	Pulled High	Pulled High
Change Direction to input	Pulled High	Ports B,C: Will be pulled high Port A: will hold last value written to the line.

Boards with 100 kΩ Pull Down resistors. (i.e. PCI-6503 with jumper in pull-down position)

	OKI	Intersil
Power Up State	Pulled Low	Pulled High
Change Direction to input	Pulled Low	Ports B,C: Will be pulled high Port A: will hold last value written to the line.

External Pull Resistor Added

All products:

External Pull Up on a line
Power Up State	Pulled High	Pulled High
Change Direction to input	Pulled High	Ports B,C: Will be pulled high Port A: If last value = 1, then it will be pulled high regardless of value of the pull up resistor If last value = 0, then if the pull up is < 5.3 kΩ, then it will be pulled high. If pull up is > 5.3 kΩ, the line may hold an undefined or logic low value.
External Pull Down on a line
Power Up State	Pulled Down	If the pull down is < 1.7 kΩ, then the line will remain a logic low value. If the pull down is > 1.7 kΩ, then the line may hold an undefined or logic high value.
Change Direction to input	Pulled Down	All Ports: If last value = 0, then the line will be pulled low (pull down resistor of up to 100 kΩ on ports B and C) If last value = 1, then if R<1.7 kΩ, the line will be pulled low; If R>1.7 kΩ, then the line may hold an undefined or logic high value

Detailed background

Both components are functionally equivalent except for their I/O buffers. Particularly, the difference comes in on how the two components behave when the port lines are configured as inputs.

The 82C55 IC has 3 ports of digital I/O: Port A, Port B and Port C. Each of these ports can be set as input or outputs independently, and port C has extra functionality to support some data transfer protocols.

The OKI component.

The OKI component did not have any internal circuitry to pull its digital lines high or low. The state of the lines when configured as inputs needed to be defined by external pull resistors. On some National Instruments products the lines did not have any pull resistor; on some others, the board had fixed 100 kΩ pull up resistors; other products have a selectable 100kΩ pull up or down or the lines could be left “floating” to be individually configured with external resistors. On any of these products the user could define the state of the digital lines at power up and when configured as inputs by setting the pull resistor options. On boards that have a fixed 100 kΩ pull up, or on configurations in which the global pull setting needed to be changed, an external resistor could be added to force the state of the line to the opposite state. For example, on the PCI-6025E, there is a fixed 100 kΩ pull up resistor. We recommended using a 1.7 kΩ pull down resistor if the user wanted a line to power up in the low state. The same applies for the state the line takes when the line is configured as an input and is not driven.

The Intersil component

The Intersil component added a feature to their I/O buffers called Bus Hold. The Bus Hold feature is designed to set the state of the line when the line is configured as an input without the need of external resistors. It is a circuit that monitors the state of the line and implements a feedback loop to try to keep this value by driving the line weakly.

The Intersil part has a full bus hold circuit on port A. That is, a bus hold that can hold either a 0 or a 1 state (see Bus Hold A.gif attachment for a schematic diagram). This bus hold is always active on any line that is configured for input. The Intersil part has, on ports B and C, a bus hold circuit that can only hold a high state (see Bus Hold BC.gif). This bus hold circuit is enabled at reset or when the lines change directions or mode, and disabled on the first valid logic 0 input. These bus holds can drive a maximum current of 400uA to try to hold a state. In order to override the state the bus hold is trying to keep, the line needs to be driven with a low enough impedance so that the 400uA (plus leakage plus the effect of any other pull resistors on the circuit) are not enough to keep the current state. For example:

If the bus hold is keeping the line at a value of 1, the line needs to be pulled low with a low enough impedance to force a low state in order to override the high value. In this case, assuming the leakage of the input line is 10uA, and a 100kΩ pull up resistor, the value required is 1.7kΩ. (The total current due to all factors adds up to 457uA. In order to have a 0.8 volts on the input (max V_IL, the max impedance is 1.7kΩ).

If the bus hold is keeping the line at a value of 0 (port A only), the line needs to be pulled high with a low enough impedance to force a high state in order to override the low state. In this case, assuming a leakage current of 10uA, and a worst case voltage supply of 4.5V, the maximum resistance required to set the voltage at 2.2V (minimum V_IH) would be 5.6kΩ. (The total current is 410uA, across 5.6kΩ is 2.296V. The voltage on the line will be 4.5V – 2.296V = 2.204V).

Report Date: 03/08/2005
Last Updated: 06/26/2009
Document ID: 3J7DSBQO

Your Feedback!

Poor | Excellent

Yes

Document Quality?

Answered Your Question?

Please Contact NI for all product and support inquiries.