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Why Are the Digital Output Lines of My R Series Device Going High When I Run My Host Interface VI?

Primary Software: LabVIEW Modules>>FPGA Module
Primary Software Version: 1.0
Primary Software Fixed Version: N/A
Secondary Software: N/A
Hardware: Reconfigurable I/O (RIO)>>R Series>>PCI-7831R, Reconfigurable I/O (RIO)>>R Series>>PXI-7831R, Reconfigurable I/O (RIO)>>R Series>>PXI-7811R

Problem: When I run my host interface VI to control the VI running on the FPGA on my R Series device, I notice that the digital output lines of the R Series device go high when my host interface calls the Close FPGA VI Reference.vi. How can I fix this?

Solution: To prevent the digital lines from going high, do not abort the FPGA VI from the Close FPGA VI Reference. Instead, programmatically stop the FPGA VI with a stop button from the host interface. Call the abort method from the host using the Invoke Method on the FPGA palette. Finally, modify the Close FPGA VI Reference.vi to only Close the reference rather than choosing to Close and Abort. To adjust this setting, right-click on the Close FPGA VI Reference.vi and change the VI to Close. This will prohibit the VI from continuing to run.

Related Links:
KnowledgeBase 32SDRDUL: What is the FPGA Chip Used in the 7831R Board?

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Report Date: 08/07/2004
Last Updated: 10/18/2004
Document ID: 3C6JDEL1

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