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PFI Lines (E Series VS. M Series)

Hardware: Multifunction DAQ (MIO)

Problem:
What is the difference between the PFI Lines on an E-Series device and an M-Series device?

Solution:
M-Series device PFI (Programmable Function Interface) lines have added functionality in relation to E-Series. For details see the expanded selection below and/or complete E-Series and M-Series help files under Index » PFI.

M-Series

M-Series devices have 16 PFI lines. Each PFI can be individually configured as the following:
  1. Static Digital Input
  2. Static Digital Output
  3. Timing Input Signal for AI, AO, DI, DO, or counter/timer functions
  4. Timing Output Signal from AI, AO, DI, DO, or counter/timer functions
Each PFI can be individually configured as a static digital input or a static digital output. When a terminal is used as a static digital input or output, it is called P1.x or P2.x. On the I/O connector, each terminal is labeled PFI x/P1.x or PFI x/P2.x. Static I/O is basic digital I/O that employs no handshaking or hardware-controlled timing. Static I/O mode is interrupt driven, so it is relatively slow, allowing a maximum of about 10 kHz depending on your computer.

When a terminal is used as a timing input or output signal, it is called PFI x (where x is an integer from 0 to 15). When a terminal is used as a static digital input or output, it is called P1.x or P2.x. On the I/O connector, each terminal is labeled PFI x/P1.x or PFI x/P2.x. The voltage input and output levels and the current drive levels of the PFI signals are listed in the specifications of your device.

Measurement and Automation Explorer (MAX) also now offers Device Route tabs for M Series devices, which contains information on routes available. Additionally, you can enable a programmable debouncing filter on each PFI signal. When the filters are enabled, your device samples the input on each rising edge of a filter clock. M Series devices use an onboard oscillator to generate the filter clock with a 40 MHz frequency.

E-Series

E-Series devices have 10 PFI lines which can be configured as the following:
  1. Timing Input Signal for AI, AO, or counter/timer functions
  2. Timing Output Signal from AI, AO, or counter/timer functions
An external timing signal can be input on any PFI pin and multiple timing signals can simultaneously use the same PFI pin. This flexible routing scheme reduces the need to change the physical connections to the I/O connector for different applications. When using the PFI pin as an input, you can individually configure each PFI for edge or level detection and for polarity selection. You can use the polarity selection for any of the timing signals, but the edge or level detection depends upon the particular timing signal being controlled. The detection requirements for each timing signal are listed within the section that discusses that signal.

You can also individually enable each PFI pin to output a specific internal timing signal. For example, if you need the Counter 0 Source signal as an output on the I/O connector, software can turn on the output driver for the PFI 8/CTR 0 SRC pin. This signal, however, cannot be output on any other PFI pin.

Related Links:
KnowledgeBase 3GUDNLFQ: How Do I Use the PFI Lines of My M Series Board For Static Digital Input or Output?
KnowledgeBase 3E78PKHS: Major Differences Between E Series and M Series
Developer Zone Tutorial: Digital I/O Applications
Product Reference: E Series User Manual
Product Reference: M Series User Manual
KnowledgeBase 3HADUKBH: Digital Filtering with M Series and CompactDAQ

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Report Date: 03/08/2005
Last Updated: 08/14/2008
Document ID: 3J79NBUR

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