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How is the Timeout Specified for the "Wait on..." I/O Method Node Under FPGA Specifying Timeout

Primary Software: LabVIEW Modules>>FPGA Module
Primary Software Version: 1.1
Primary Software Fixed Version: N/A
Secondary Software: N/A
Hardware: Reconfigurable I/O (RIO)>>R Series>>PXI-7831R

Problem:
When specifying the timeout on the wait on rising edge, falling edge, any edge, high level, low level, there's no information in LabVIEW 8.2 or earlier on what units you use. What units do I use?

Solution:
Timing is in ticks, based on the board clock (40MHz by default - alter under the fpga target options). The number of ticks can be determined by multiplying the board clock by the timeout. So a 100ms timeout would be 40,000,000 x 0.100 = 4,000,000 ticks.

A value of 0 causes the method to timeout immediately.  A negative value causes the method to wait indefinitely until an edge or level is detected.

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Report Date: 10/28/2004
Last Updated: 04/24/2008
Document ID: 3ER3EAXZ

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