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Transient Analysis with a Time Delay Switch (TD_SW1) in Multisim?

Primary Software: Electronics Workbench>>Multisim
Primary Software Version: 9.x
Primary Software Fixed Version: N/A
Secondary Software: N/A

Problem:

How do I make the Time Delay Switch (TD_SW1) to work during a Transient Analysis in Multisim? When I simulate a circuit with the TD_SW1 everything works fine but if I run an analysis it does not seems to switch its state.



Solution:

A Time Delay Switch (TD_SW1) is an interactive component that requires special programming to make the symbol change its graphic state on your screen as well as during simulation. The language used to create this interactive component is not native to SPICE and the Co-simulation capabilities of the Multisim Simulation Engine is what makes it work together with SPICE during a simulation.

However, unlike a simulation task in Multisim, running an analysis is a different type of task. Transient Analysis is a pure SPICE command that requires a pure SPICE netlist. Right before an analysis is calculated, Multisim takes a snapshot of your circuit at its present state, then it creates an equivalent SPICE netlist of that snapshot. Once the analysis starts, it will not look at the circuit anymore, therefore it will not see the switch changing its state.

If you really need to run a Transient Analysis with the Time Delay Switch you can workaround this limitation if you create a new custom component. You must create a model with only native SPICE commands such as the next example model:

.subckt TD S1 S2
xU2 1 0 S1 S2 SW
xU1 1 0 PWL
.subckt SW 1 2 3 4
S1 3 4 1 2 vsw
.model vsw sw (
+ vt = 0.001
+ vh = -1e-006
+ ron = 0.1
+ roff = 1e+009
+ )
.ends
.subckt PWL 1 2
V1 1 0 PWL (0,0) (0.01,0) (0.01001,10)
.ends
.ends

This component includes two important models:

  1. PWL (Piece Wise Linear Source)
  2. VSW (Voltage Controlled Switch)

A PWL allows you to enter data points of Time vs Voltage, in the previous example the PWL was declared at the following line:

V1 1 0 PWL (0,0) (0.01,0) (0.0102,10)

Since a PWL is a connect the dot type of component, we should add an intermediate point between the low (0 V) and high (10 V) state to ensure a sharp rise time. In the example you have a rise time of 0.0002 seconds as you can verify in the 2nd and 3rd coordinates. Once the PWL makes the transient from low to high, and vice versa, it will trigger the voltage controlled switch which is declared by the vsw model.

The attached file includes a simple example of this switch.

If you are not familiar with SPICE and would like to learn more about it, please visit the SPICE Simulation Fundamentals Tutorial, and the Creating a Custom Component in NI Multisim Tutorial.



Related Links:

Developer Zone Tutorial: SPICE Simulation Fundamentals
Developer Zone Tutorial: Creating a Custom Component in NI Multisim



Attachments:


Time Delay switch.ms9


Report Date: 12/11/2006
Last Updated: 04/03/2008
Document ID: 44ABSNMC

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