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Digital Semiconductor Validation Test Architecture Details


Here you will find detailed information and example code to perform memory tests as well as Bit Error Rate Tests (BERT). Additionally, you will also gain access to code that will enable you to implement serial communication protocols such as JTAG, SPI, and I2C.


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Reference Architecture System Details

  • Digital Semiconductor Validation Testing: Hardware Components
  • Digital Semiconductor Validation Testing: Software Components

Reference Architecture Technical Details

  • Memory Test Reference Design
  • Bit Error Rate Test (BERT) Reference Design
  • Serial Protocol Communication Reference Design
  • JTAG Digital Waveform Reference Library
  • SPI Digital Waveform Reference Library
  • I2C Digital Waveform Reference Library